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| Job details |
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| POST-SILICON CMV MANAGER |
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| Description |
POST-SILICON CIRCUIT MARGINALITY VERIFICATION MANAGER #1238501
Manage and lead the group responsible for post-silicon Circuit Marginality Verification. You will correlate tester schmoo plots with actual operating characteristics in real systems. The group will write test plans, develop tests and characterize and analyze failures. You will work with cross-site teams. You will forecast headcount needs and spending requirements as part of building implementation plans to hit project schedules.
MINIMUM REQUIRMENTS:
- BS or MS degree in Electrical Engineering with 8 years or more of experience and at least 2 years of management experience
- Post-silicon verification experience
- Proven experience in building a team, creating test plans and hitting schedules
- Knowledge of ATE equipment and usage and lab bringup skills
- Good interpersonal and communication skills
EOE |
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